SDRAM Controller

This SDRAM controller is developed for use on the CoreConnect - OPB bus. The SDRAM Controller is the part of a system that controls the memory. It generates the necessary signals to control the reading and writing of information from and to the memory. DRAM (Dynamic Random Access Memory) constitutes the basic building block for most memory systems. The SDRAM controller automatically handles SDRAM timing such as row and column latency, precharge timing, and row access length.

• Embedded systems
   
• Networking equipment
   
• Communication equipment
   
• Video systems
   
• PC peripherals
   
• Digital signal processing
   

• Low gate count, high speed, high preformance solution
   
• SDRAM Refresh capability
   
• Supports Virtex ™, Virtex ™ –E , Spartan and Spartan-II FPGA:s
   
• Supports burst size of 1 to 8
   
• Works with SDRAM, 24-bit address
   
• 16-bit or 32 bit data
   

• Netlist - Contact RealFast for price
   
• Source code - Contact RealFast for price

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• Datasheet
   
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Datasheet